1. Field of the Invention
This invention relates to computer processors and, more particularly, to performing floating point to nearest integer operations in computer processors.
2. Description of the Related Art
Microprocessors have evolved to include a variety of features aimed at improving the speed and efficiency of calculations. For example, microprocessors may be designed to execute various floating point instructions. Floating point refers to a system for representing numbers in which a string of digits or bits represents a rational number. In a floating point number, a radix point (sometimes referred to as a decimal point or a binary point) may be placed anywhere relative to the significant digits or bits of the number. A floating point instruction, as used herein, is therefore any computer instruction that takes as input or produces as output one or more floating point numbers.
Floating point instructions may be executed by hardware built into any of a variety of general-purpose microprocessors that have been designed around a variety of instruction architectures. For example, the x86 architecture (also known as the IA-32 architecture) has enjoyed widespread acceptance and success in the marketplace. Other processors may be designed to support various other architectures such as PowerPC, SPARC, ARM, MIPS, etc. that include various floating point instructions.
In order to increase available processing power, computer systems may include multiple general-purpose microprocessors. Alternatively, or in addition, computer systems may include one or more special-purpose processing units. For example, many computer systems include one or more graphics processing units (GPUs) as separate processors or incorporated into a microprocessor intended to execute graphics calculations. Graphics calculations tend to make heavy use of floating point instructions. Further, modern processors may include multiple execution units, each of which is capable of executing a variety of instructions in parallel, including floating point instructions. In particular, some processors may include one or more execution units dedicated to the purpose of executing floating-point instructions, often referred to as floating point execution units or FPUs. Generally speaking, any of the above processing units may support various floating point instructions.
Often in the course of performing floating point operations, it may be desired to round a floating point number to the nearest integer value. In addition, it may be desired that the result be expressed as a floating point number. In other words, it may be desirable to round a floating point number to the nearest integral valued floating point number. Some examples of instructions that may be found in one or more versions of the x86 architecture that output a floating point number that has been rounded to a nearest integral value include: FRNDINT, ROUNDPD, ROUNDPS, ROUNDSD, and ROUNDSS instructions. In general, implementations of these and similar instructions have included a first operation to convert a floating point number to a nearest integer followed by a second operation to convert the integer back to a floating point number. Unfortunately, the second operation increases the overall latency of such implementations.
In view of the above, a more efficient method and mechanism for performing operations that round floating point numbers to a nearest integer and express the result as a floating point number are desired.